diff options
Diffstat (limited to '0105-Backport-SME-AArch64-Cleanup-option-processing-code.patch')
| -rw-r--r-- | 0105-Backport-SME-AArch64-Cleanup-option-processing-code.patch | 528 |
1 files changed, 528 insertions, 0 deletions
diff --git a/0105-Backport-SME-AArch64-Cleanup-option-processing-code.patch b/0105-Backport-SME-AArch64-Cleanup-option-processing-code.patch new file mode 100644 index 0000000..c945c81 --- /dev/null +++ b/0105-Backport-SME-AArch64-Cleanup-option-processing-code.patch @@ -0,0 +1,528 @@ +From ba32885874fc6caa90f6ae5e264bc3d51f64a26e Mon Sep 17 00:00:00 2001 +From: Wilco Dijkstra <wilco.dijkstra@arm.com> +Date: Wed, 1 Jun 2022 16:46:36 +0100 +Subject: [PATCH 006/157] [Backport][SME] AArch64: Cleanup option processing + code + +Reference: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=ae54c1b09963779c5c3914782324ff48af32e2f1 + +Further cleanup option processing. Remove the duplication of global +variables for CPU and tune settings so that CPU option processing is +simplified even further. Move global variables that need save and +restore due to target option processing into aarch64.opt. This removes +the need for explicit saving/restoring and unnecessary reparsing of +options. + +gcc/ + * config/aarch64/aarch64.opt (explicit_tune_core): Rename to + selected_tune. + (explicit_arch): Rename to selected_arch. + (x_aarch64_override_tune_string): Remove. + (aarch64_ra_sign_key): Add as TargetVariable so it gets saved/restored. + (aarch64_override_tune_string): Add Save so it gets saved/restored. + * config/aarch64/aarch64.h (aarch64_architecture_version): Remove. + * config/aarch64/aarch64.cc (aarch64_architecture_version): Remove. + (processor): Remove archtecture_version field. + (selected_arch): Remove global. + (selected_cpu): Remove global. + (selected_tune): Remove global. + (aarch64_ra_sign_key): Move global to aarch64.opt so it is saved. + (aarch64_override_options_internal): Use aarch64_get_tune_cpu. + (aarch64_override_options): Further simplify code to only set + selected_arch and selected_tune globals. + (aarch64_option_save): Remove now that target options are saved. + (aarch64_option_restore): Remove redundant target option restores. + * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Use + AARCH64_ISA_V9. + * config/aarch64/aarch64-opts.h (aarch64_key_type): Add, moved from... + * config/aarch64/aarch64-protos.h (aarch64_key_type): Remove. + (aarch64_ra_sign_key): Remove. +--- + gcc/config/aarch64/aarch64-c.cc | 2 +- + gcc/config/aarch64/aarch64-opts.h | 6 + + gcc/config/aarch64/aarch64-protos.h | 8 -- + gcc/config/aarch64/aarch64.cc | 183 ++++++++++------------------ + gcc/config/aarch64/aarch64.h | 3 - + gcc/config/aarch64/aarch64.opt | 12 +- + 6 files changed, 76 insertions(+), 138 deletions(-) + +diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc +index a4c407724..90d45e45d 100644 +--- a/gcc/config/aarch64/aarch64-c.cc ++++ b/gcc/config/aarch64/aarch64-c.cc +@@ -82,7 +82,7 @@ aarch64_update_cpp_builtins (cpp_reader *pfile) + { + aarch64_def_or_undef (flag_unsafe_math_optimizations, "__ARM_FP_FAST", pfile); + +- builtin_define_with_int_value ("__ARM_ARCH", aarch64_architecture_version); ++ builtin_define_with_int_value ("__ARM_ARCH", AARCH64_ISA_V9 ? 9 : 8); + + builtin_define_with_int_value ("__ARM_SIZEOF_MINIMAL_ENUM", + flag_short_enums ? 1 : 4); +diff --git a/gcc/config/aarch64/aarch64-opts.h b/gcc/config/aarch64/aarch64-opts.h +index 93572fe83..421648a15 100644 +--- a/gcc/config/aarch64/aarch64-opts.h ++++ b/gcc/config/aarch64/aarch64-opts.h +@@ -98,4 +98,10 @@ enum stack_protector_guard { + SSP_GLOBAL /* global canary */ + }; + ++/* The key type that -msign-return-address should use. */ ++enum aarch64_key_type { ++ AARCH64_KEY_A, ++ AARCH64_KEY_B ++}; ++ + #endif +diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h +index 475d174dd..e60ce3c36 100644 +--- a/gcc/config/aarch64/aarch64-protos.h ++++ b/gcc/config/aarch64/aarch64-protos.h +@@ -672,14 +672,6 @@ enum simd_immediate_check { + AARCH64_CHECK_MOV = AARCH64_CHECK_ORR | AARCH64_CHECK_BIC + }; + +-/* The key type that -msign-return-address should use. */ +-enum aarch64_key_type { +- AARCH64_KEY_A, +- AARCH64_KEY_B +-}; +- +-extern enum aarch64_key_type aarch64_ra_sign_key; +- + extern struct tune_params aarch64_tune_params; + + /* The available SVE predicate patterns, known in the ACLE as "svpattern". */ +diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc +index ba888beb0..254ecfaa2 100644 +--- a/gcc/config/aarch64/aarch64.cc ++++ b/gcc/config/aarch64/aarch64.cc +@@ -306,9 +306,6 @@ static bool aarch64_print_address_internal (FILE*, machine_mode, rtx, + aarch64_addr_query_type); + static HOST_WIDE_INT aarch64_clamp_to_uimm12_shift (HOST_WIDE_INT val); + +-/* Major revision number of the ARM Architecture implemented by the target. */ +-unsigned aarch64_architecture_version; +- + /* The processor for which instructions should be scheduled. */ + enum aarch64_processor aarch64_tune = cortexa53; + +@@ -2931,7 +2928,6 @@ struct processor + enum aarch64_processor ident; + enum aarch64_processor sched_core; + enum aarch64_arch arch; +- unsigned architecture_version; + const uint64_t flags; + const struct tune_params *const tune; + }; +@@ -2940,9 +2936,9 @@ struct processor + static const struct processor all_architectures[] = + { + #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \ +- {NAME, CORE, CORE, AARCH64_ARCH_##ARCH_IDENT, ARCH_REV, FLAGS, NULL}, ++ {NAME, CORE, CORE, AARCH64_ARCH_##ARCH_IDENT, FLAGS, NULL}, + #include "aarch64-arches.def" +- {NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, 0, NULL} ++ {NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, NULL} + }; + + /* Processor cores implementing AArch64. */ +@@ -2950,23 +2946,13 @@ static const struct processor all_cores[] = + { + #define AARCH64_CORE(NAME, IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \ + {NAME, IDENT, SCHED, AARCH64_ARCH_##ARCH, \ +- all_architectures[AARCH64_ARCH_##ARCH].architecture_version, \ + FLAGS, &COSTS##_tunings}, + #include "aarch64-cores.def" +- {"generic", generic, cortexa53, AARCH64_ARCH_8A, 8, ++ {"generic", generic, cortexa53, AARCH64_ARCH_8A, + AARCH64_FL_FOR_ARCH8, &generic_tunings}, +- {NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, 0, NULL} ++ {NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, NULL} + }; + +- +-/* Target specification. These are populated by the -march, -mtune, -mcpu +- handling code or by target attributes. */ +-static const struct processor *selected_arch; +-static const struct processor *selected_cpu; +-static const struct processor *selected_tune; +- +-enum aarch64_key_type aarch64_ra_sign_key = AARCH64_KEY_A; +- + /* The current tuning set. */ + struct tune_params aarch64_tune_params = generic_tunings; + +@@ -10633,8 +10619,8 @@ aarch64_case_values_threshold (void) + /* Use the specified limit for the number of cases before using jump + tables at higher optimization levels. */ + if (optimize > 2 +- && selected_cpu->tune->max_case_values != 0) +- return selected_cpu->tune->max_case_values; ++ && aarch64_tune_params.max_case_values != 0) ++ return aarch64_tune_params.max_case_values; + else + return optimize_size ? 8 : 11; + } +@@ -17769,6 +17755,26 @@ initialize_aarch64_tls_size (struct gcc_options *opts) + return; + } + ++/* Return the CPU corresponding to the enum CPU. */ ++ ++static const struct processor * ++aarch64_get_tune_cpu (enum aarch64_processor cpu) ++{ ++ gcc_assert (cpu != aarch64_none); ++ ++ return &all_cores[cpu]; ++} ++ ++/* Return the architecture corresponding to the enum ARCH. */ ++ ++static const struct processor * ++aarch64_get_arch (enum aarch64_arch arch) ++{ ++ gcc_assert (arch != aarch64_no_arch); ++ ++ return &all_architectures[arch]; ++} ++ + /* Parse STRING looking for options in the format: + string :: option:string + option :: name=substring +@@ -17879,18 +17885,18 @@ aarch64_override_options_after_change_1 (struct gcc_options *opts) + void + aarch64_override_options_internal (struct gcc_options *opts) + { +- aarch64_tune_flags = selected_tune->flags; +- aarch64_tune = selected_tune->sched_core; ++ const struct processor *tune = aarch64_get_tune_cpu (opts->x_selected_tune); ++ aarch64_tune_flags = tune->flags; ++ aarch64_tune = tune->sched_core; + /* Make a copy of the tuning parameters attached to the core, which + we may later overwrite. */ +- aarch64_tune_params = *(selected_tune->tune); +- aarch64_architecture_version = selected_arch->architecture_version; +- if (selected_tune->tune == &generic_tunings) ++ aarch64_tune_params = *(tune->tune); ++ if (tune->tune == &generic_tunings) + aarch64_adjust_generic_arch_tuning (aarch64_tune_params); + + if (opts->x_aarch64_override_tune_string) + aarch64_parse_override_string (opts->x_aarch64_override_tune_string, +- &aarch64_tune_params); ++ &aarch64_tune_params); + + /* This target defaults to strict volatile bitfields. */ + if (opts->x_flag_strict_volatile_bitfields < 0 && abi_version_at_least (2)) +@@ -18051,13 +18057,6 @@ aarch64_override_options_internal (struct gcc_options *opts) + && opts->x_optimize >= aarch64_tune_params.prefetch->default_opt_level) + opts->x_flag_prefetch_loop_arrays = 1; + +- if (opts->x_aarch64_arch_string == NULL) +- opts->x_aarch64_arch_string = selected_arch->name; +- if (opts->x_aarch64_cpu_string == NULL) +- opts->x_aarch64_cpu_string = selected_cpu->name; +- if (opts->x_aarch64_tune_string == NULL) +- opts->x_aarch64_tune_string = selected_tune->name; +- + aarch64_override_options_after_change_1 (opts); + } + +@@ -18409,26 +18408,6 @@ aarch64_validate_mtune (const char *str, const struct processor **res) + return false; + } + +-/* Return the CPU corresponding to the enum CPU. */ +- +-static const struct processor * +-aarch64_get_tune_cpu (enum aarch64_processor cpu) +-{ +- gcc_assert (cpu != aarch64_none); +- +- return &all_cores[cpu]; +-} +- +-/* Return the architecture corresponding to the enum ARCH. */ +- +-static const struct processor * +-aarch64_get_arch (enum aarch64_arch arch) +-{ +- gcc_assert (arch != aarch64_no_arch); +- +- return &all_architectures[arch]; +-} +- + /* Return the VG value associated with -msve-vector-bits= value VALUE. */ + + static poly_uint16 +@@ -18464,9 +18443,9 @@ aarch64_override_options (void) + uint64_t arch_isa = 0; + aarch64_isa_flags = 0; + +- selected_cpu = NULL; +- selected_arch = NULL; +- selected_tune = NULL; ++ const struct processor *cpu = NULL; ++ const struct processor *arch = NULL; ++ const struct processor *tune = NULL; + + if (aarch64_harden_sls_string) + aarch64_validate_sls_mitigation (aarch64_harden_sls_string); +@@ -18478,56 +18457,52 @@ aarch64_override_options (void) + If either of -march or -mtune is given, they override their + respective component of -mcpu. */ + if (aarch64_cpu_string) +- aarch64_validate_mcpu (aarch64_cpu_string, &selected_cpu, &cpu_isa); ++ aarch64_validate_mcpu (aarch64_cpu_string, &cpu, &cpu_isa); + + if (aarch64_arch_string) +- aarch64_validate_march (aarch64_arch_string, &selected_arch, &arch_isa); ++ aarch64_validate_march (aarch64_arch_string, &arch, &arch_isa); + + if (aarch64_tune_string) +- aarch64_validate_mtune (aarch64_tune_string, &selected_tune); ++ aarch64_validate_mtune (aarch64_tune_string, &tune); + + #ifdef SUBTARGET_OVERRIDE_OPTIONS + SUBTARGET_OVERRIDE_OPTIONS; + #endif + +- if (selected_cpu && selected_arch) ++ if (cpu && arch) + { + /* If both -mcpu and -march are specified, warn if they are not + architecturally compatible and prefer the -march ISA flags. */ +- if (selected_arch->arch != selected_cpu->arch) ++ if (arch->arch != cpu->arch) + { + warning (0, "switch %<-mcpu=%s%> conflicts with %<-march=%s%> switch", + aarch64_cpu_string, + aarch64_arch_string); + } + ++ selected_arch = arch->arch; + aarch64_isa_flags = arch_isa; + } +- else if (selected_cpu) ++ else if (cpu) + { +- selected_arch = &all_architectures[selected_cpu->arch]; ++ selected_arch = cpu->arch; + aarch64_isa_flags = cpu_isa; + } +- else if (selected_arch) ++ else if (arch) + { +- selected_cpu = &all_cores[selected_arch->ident]; ++ cpu = &all_cores[arch->ident]; ++ selected_arch = arch->arch; + aarch64_isa_flags = arch_isa; + } + else + { + /* No -mcpu or -march specified, so use the default CPU. */ +- selected_cpu = &all_cores[TARGET_CPU_DEFAULT]; +- selected_arch = &all_architectures[selected_cpu->arch]; +- aarch64_isa_flags = selected_cpu->flags; ++ cpu = &all_cores[TARGET_CPU_DEFAULT]; ++ selected_arch = cpu->arch; ++ aarch64_isa_flags = cpu->flags; + } + +- explicit_arch = selected_arch->arch; +- if (!selected_tune) +- selected_tune = selected_cpu; +- explicit_tune_core = selected_tune->ident; +- +- gcc_assert (explicit_tune_core != aarch64_none); +- gcc_assert (explicit_arch != aarch64_no_arch); ++ selected_tune = tune ? tune->ident : cpu->ident; + + if (aarch64_enable_bti == 2) + { +@@ -18646,38 +18621,14 @@ initialize_aarch64_code_model (struct gcc_options *opts) + } + } + +-/* Implement TARGET_OPTION_SAVE. */ +- +-static void +-aarch64_option_save (struct cl_target_option *ptr, struct gcc_options *opts, +- struct gcc_options */* opts_set */) +-{ +- ptr->x_aarch64_override_tune_string = opts->x_aarch64_override_tune_string; +- ptr->x_aarch64_branch_protection_string +- = opts->x_aarch64_branch_protection_string; +-} +- + /* Implements TARGET_OPTION_RESTORE. Restore the backend codegen decisions + using the information saved in PTR. */ + + static void + aarch64_option_restore (struct gcc_options *opts, +- struct gcc_options */* opts_set */, +- struct cl_target_option *ptr) ++ struct gcc_options * /* opts_set */, ++ struct cl_target_option * /* ptr */) + { +- opts->x_explicit_arch = ptr->x_explicit_arch; +- selected_arch = aarch64_get_arch (ptr->x_explicit_arch); +- opts->x_explicit_tune_core = ptr->x_explicit_tune_core; +- selected_tune = aarch64_get_tune_cpu (ptr->x_explicit_tune_core); +- opts->x_aarch64_override_tune_string = ptr->x_aarch64_override_tune_string; +- opts->x_aarch64_branch_protection_string +- = ptr->x_aarch64_branch_protection_string; +- if (opts->x_aarch64_branch_protection_string) +- { +- aarch64_parse_branch_protection (opts->x_aarch64_branch_protection_string, +- NULL); +- } +- + aarch64_override_options_internal (opts); + } + +@@ -18687,11 +18638,11 @@ static void + aarch64_option_print (FILE *file, int indent, struct cl_target_option *ptr) + { + const struct processor *cpu +- = aarch64_get_tune_cpu (ptr->x_explicit_tune_core); +- uint64_t isa_flags = ptr->x_aarch64_isa_flags; +- const struct processor *arch = aarch64_get_arch (ptr->x_explicit_arch); ++ = aarch64_get_tune_cpu (ptr->x_selected_tune); ++ const struct processor *arch = aarch64_get_arch (ptr->x_selected_arch); + std::string extension +- = aarch64_get_extension_string_for_isa_flags (isa_flags, arch->flags); ++ = aarch64_get_extension_string_for_isa_flags (ptr->x_aarch64_isa_flags, ++ arch->flags); + + fprintf (file, "%*sselected tune = %s\n", indent, "", cpu->name); + fprintf (file, "%*sselected arch = %s%s\n", indent, "", +@@ -18804,8 +18755,7 @@ aarch64_handle_attr_arch (const char *str) + if (parse_res == AARCH64_PARSE_OK) + { + gcc_assert (tmp_arch); +- selected_arch = tmp_arch; +- explicit_arch = selected_arch->arch; ++ selected_arch = tmp_arch->arch; + return true; + } + +@@ -18843,11 +18793,8 @@ aarch64_handle_attr_cpu (const char *str) + if (parse_res == AARCH64_PARSE_OK) + { + gcc_assert (tmp_cpu); +- selected_tune = tmp_cpu; +- explicit_tune_core = selected_tune->ident; +- +- selected_arch = &all_architectures[tmp_cpu->arch]; +- explicit_arch = selected_arch->arch; ++ selected_tune = tmp_cpu->ident; ++ selected_arch = tmp_cpu->arch; + return true; + } + +@@ -18915,8 +18862,7 @@ aarch64_handle_attr_tune (const char *str) + if (parse_res == AARCH64_PARSE_OK) + { + gcc_assert (tmp_tune); +- selected_tune = tmp_tune; +- explicit_tune_core = selected_tune->ident; ++ selected_tune = tmp_tune->ident; + return true; + } + +@@ -22821,7 +22767,7 @@ aarch64_declare_function_name (FILE *stream, const char* name, + gcc_assert (targ_options); + + const struct processor *this_arch +- = aarch64_get_arch (targ_options->x_explicit_arch); ++ = aarch64_get_arch (targ_options->x_selected_arch); + + uint64_t isa_flags = targ_options->x_aarch64_isa_flags; + std::string extension +@@ -22840,7 +22786,7 @@ aarch64_declare_function_name (FILE *stream, const char* name, + useful to readers of the generated asm. Do it only when it changes + from function to function and verbose assembly is requested. */ + const struct processor *this_tune +- = aarch64_get_tune_cpu (targ_options->x_explicit_tune_core); ++ = aarch64_get_tune_cpu (targ_options->x_selected_tune); + + if (flag_debug_asm && aarch64_last_printed_tune_string != this_tune->name) + { +@@ -22952,7 +22898,7 @@ aarch64_start_file (void) + = TREE_TARGET_OPTION (target_option_default_node); + + const struct processor *default_arch +- = aarch64_get_arch (default_options->x_explicit_arch); ++ = aarch64_get_arch (default_options->x_selected_arch); + uint64_t default_isa_flags = default_options->x_aarch64_isa_flags; + std::string extension + = aarch64_get_extension_string_for_isa_flags (default_isa_flags, +@@ -27950,9 +27896,6 @@ aarch64_libgcc_floating_mode_supported_p + #undef TARGET_OFFLOAD_OPTIONS + #define TARGET_OFFLOAD_OPTIONS aarch64_offload_options + +-#undef TARGET_OPTION_SAVE +-#define TARGET_OPTION_SAVE aarch64_option_save +- + #undef TARGET_OPTION_RESTORE + #define TARGET_OPTION_RESTORE aarch64_option_restore + +diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h +index 14e2af054..7d73689e4 100644 +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -144,9 +144,6 @@ + + #define PCC_BITFIELD_TYPE_MATTERS 1 + +-/* Major revision number of the ARM Architecture implemented by the target. */ +-extern unsigned aarch64_architecture_version; +- + /* Instruction tuning/selection flags. */ + + /* Bit values used to identify processor capabilities. */ +diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt +index 101664c7c..836a3c784 100644 +--- a/gcc/config/aarch64/aarch64.opt ++++ b/gcc/config/aarch64/aarch64.opt +@@ -22,13 +22,10 @@ HeaderInclude + config/aarch64/aarch64-opts.h + + TargetVariable +-enum aarch64_processor explicit_tune_core = aarch64_none ++enum aarch64_processor selected_tune = aarch64_none + + TargetVariable +-enum aarch64_arch explicit_arch = aarch64_no_arch +- +-TargetSave +-const char *x_aarch64_override_tune_string ++enum aarch64_arch selected_arch = aarch64_no_arch + + TargetVariable + uint64_t aarch64_isa_flags = 0 +@@ -36,6 +33,9 @@ uint64_t aarch64_isa_flags = 0 + TargetVariable + unsigned aarch64_enable_bti = 2 + ++TargetVariable ++enum aarch64_key_type aarch64_ra_sign_key = AARCH64_KEY_A ++ + ; The TLS dialect names to use with -mtls-dialect. + + Enum +@@ -139,7 +139,7 @@ Target RejectNegative Joined Enum(aarch64_abi) Var(aarch64_abi) Init(AARCH64_ABI + Generate code that conforms to the specified ABI. + + moverride= +-Target RejectNegative ToLower Joined Var(aarch64_override_tune_string) ++Target RejectNegative ToLower Joined Var(aarch64_override_tune_string) Save + -moverride=<string> Power users only! Override CPU optimization parameters. + + Enum +-- +2.33.0 + |