diff options
Diffstat (limited to '0001-src-common-crc32c_intel_fast.patch')
| -rw-r--r-- | 0001-src-common-crc32c_intel_fast.patch | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/0001-src-common-crc32c_intel_fast.patch b/0001-src-common-crc32c_intel_fast.patch new file mode 100644 index 0000000..b0e718c --- /dev/null +++ b/0001-src-common-crc32c_intel_fast.patch @@ -0,0 +1,55 @@ +--- ceph-15.2.2/src/common/crc32c_intel_fast_zero_asm.s.orig 2020-05-26 08:34:32.226201974 -0400 ++++ ceph-15.2.2/src/common/crc32c_intel_fast_zero_asm.s 2020-05-26 17:19:32.497201974 -0400 +@@ -1,5 +1,5 @@ + ; +-; Copyright 2012-2013 Intel Corporation All Rights Reserved. ++; Copyright 2012-2015 Intel Corporation All Rights Reserved. + ; All rights reserved. + ; + ; http://opensource.org/licenses/BSD-3-Clause +@@ -59,6 +59,19 @@ + xor rbx, rbx ;; rbx = crc1 = 0; + xor r10, r10 ;; r10 = crc2 = 0; + ++ cmp len, %%bSize*3*2 ++ jbe %%non_prefetch ++ ++ %assign i 0 ++ %rep %%bSize/8 - 1 ++ crc32 rax, bufptmp ;; update crc0 ++ crc32 rbx, bufptmp ;; update crc1 ++ crc32 r10, bufptmp ;; update crc2 ++ %assign i (i+8) ++ %endrep ++ jmp %%next %+ %1 ++ ++%%non_prefetch: + %assign i 0 + %rep %%bSize/8 - 1 + crc32 rax, bufptmp ;; update crc0 +@@ -66,6 +79,8 @@ + crc32 r10, bufptmp ;; update crc2 + %assign i (i+8) + %endrep ++ ++%%next %+ %1: + crc32 rax, bufptmp ;; update crc0 + crc32 rbx, bufptmp ;; update crc1 + ; SKIP ;crc32 r10, bufptmp ;; update crc2 +@@ -180,12 +195,15 @@ + %define crc_init_dw r8d + %endif + +- ++ endbranch + push rdi + push rbx + + mov rax, crc_init ;; rax = crc_init; + ++ cmp len, 8 ++ jb less_than_8 ++ + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + ;; 1) ALIGN: ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + |