diff options
Diffstat (limited to 'gcc48-rh1482762.patch')
| -rw-r--r-- | gcc48-rh1482762.patch | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/gcc48-rh1482762.patch b/gcc48-rh1482762.patch new file mode 100644 index 0000000..bb570d4 --- /dev/null +++ b/gcc48-rh1482762.patch @@ -0,0 +1,53 @@ +2017-03-25 Uros Bizjak <ubizjak@gmail.com> + + PR target/80180 + * config/i386/i386.c (ix86_expand_builtin) + <IX86_BUILTIN_RDSEED{16,32,64}_STEP>: Do not expand arg0 between + flags reg setting and flags reg using instructions. + <IX86_BUILTIN_RDRAND{16,32,64}_STEP>: Ditto. Use non-flags reg + clobbering instructions to zero extend op2. + +--- gcc/config/i386/i386.c (revision 246478) ++++ gcc/config/i386/i386.c (revision 246479) +@@ -39533,9 +39533,6 @@ + mode0 = DImode; + + rdrand_step: +- op0 = gen_reg_rtx (mode0); +- emit_insn (GEN_FCN (icode) (op0)); +- + arg0 = CALL_EXPR_ARG (exp, 0); + op1 = expand_normal (arg0); + if (!address_operand (op1, VOIDmode)) +@@ -39543,6 +39540,10 @@ + op1 = convert_memory_address (Pmode, op1); + op1 = copy_addr_to_reg (op1); + } ++ ++ op0 = gen_reg_rtx (mode0); ++ emit_insn (GEN_FCN (icode) (op0)); ++ + emit_move_insn (gen_rtx_MEM (mode0, op1), op0); + + op1 = gen_reg_rtx (SImode); +@@ -39584,9 +39597,6 @@ + mode0 = DImode; + + rdseed_step: +- op0 = gen_reg_rtx (mode0); +- emit_insn (GEN_FCN (icode) (op0)); +- + arg0 = CALL_EXPR_ARG (exp, 0); + op1 = expand_normal (arg0); + if (!address_operand (op1, VOIDmode)) +@@ -39594,6 +39604,10 @@ + op1 = convert_memory_address (Pmode, op1); + op1 = copy_addr_to_reg (op1); + } ++ ++ op0 = gen_reg_rtx (mode0); ++ emit_insn (GEN_FCN (icode) (op0)); ++ + emit_move_insn (gen_rtx_MEM (mode0, op1), op0); + + op2 = gen_reg_rtx (QImode); |