automatic import of xenopeneuler22.03_LTS

1 files changed, 102 insertions, 0 deletions

diff --git a/5ec7dcaa-x86-dont-enter-C6-with-in-service-intr.patch b/5ec7dcaa-x86-dont-enter-C6-with-in-service-intr.patch
new file mode 100644
index 0000000..be68d1d
--- /dev/null
+++ b/5ec7dcaa-x86-dont-enter-C6-with-in-service-intr.patch
@@ -0,0 +1,102 @@
+# Commit fc44a7014cafe28b8c53eeaf6ac2a71f5bc8b815
+# Date 2020-05-22 16:07:38 +0200
+# Author Roger Pau Monné <roger.pau@citrix.com>
+# Committer Jan Beulich <jbeulich@suse.com>
+x86/idle: prevent entering C6 with in service interrupts on Intel
+
+Apply a workaround for Intel errata BDX99, CLX30, SKX100, CFW125,
+BDF104, BDH85, BDM135, KWB131: "A Pending Fixed Interrupt May Be
+Dispatched Before an Interrupt of The Same Priority Completes".
+
+Apply the errata to all server and client models (big cores) from
+Broadwell to Cascade Lake. The workaround is grouped together with the
+existing fix for errata AAJ72, and the eoi from the function name is
+removed.
+
+Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
+Reviewed-by: Jan Beulich <jbeulich@suse.com>
+
+--- a/xen/arch/x86/acpi/cpu_idle.c
++++ b/xen/arch/x86/acpi/cpu_idle.c
+@@ -537,7 +537,7 @@ void trace_exit_reason(u32 *irq_traced)
+     }
+ }
+ 
+-bool errata_c6_eoi_workaround(void)
++bool errata_c6_workaround(void)
+ {
+     static int8_t __read_mostly fix_needed = -1;
+ 
+@@ -562,10 +562,40 @@ bool errata_c6_eoi_workaround(void)
+             INTEL_FAM6_MODEL(0x2f),
+             { }
+         };
++        /*
++         * Errata BDX99, CLX30, SKX100, CFW125, BDF104, BDH85, BDM135, KWB131:
++         * A Pending Fixed Interrupt May Be Dispatched Before an Interrupt of
++         * The Same Priority Completes.
++         *
++         * Resuming from C6 Sleep-State, with Fixed Interrupts of the same
++         * priority queued (in the corresponding bits of the IRR and ISR APIC
++         * registers), the processor may dispatch the second interrupt (from
++         * the IRR bit) before the first interrupt has completed and written to
++         * the EOI register, causing the first interrupt to never complete.
++         */
++        static const struct x86_cpu_id isr_errata[] = {
++            /* Broadwell */
++            INTEL_FAM6_MODEL(0x47),
++            INTEL_FAM6_MODEL(0x3d),
++            INTEL_FAM6_MODEL(0x4f),
++            INTEL_FAM6_MODEL(0x56),
++            /* Skylake (client) */
++            INTEL_FAM6_MODEL(0x5e),
++            INTEL_FAM6_MODEL(0x4e),
++            /* {Sky/Cascade}lake (server) */
++            INTEL_FAM6_MODEL(0x55),
++            /* {Kaby/Coffee/Whiskey/Amber} Lake */
++            INTEL_FAM6_MODEL(0x9e),
++            INTEL_FAM6_MODEL(0x8e),
++            /* Cannon Lake */
++            INTEL_FAM6_MODEL(0x66),
++            { }
++        };
+ #undef INTEL_FAM6_MODEL
+ 
+-        fix_needed = cpu_has_apic && !directed_eoi_enabled &&
+-                     x86_match_cpu(eoi_errata);
++        fix_needed = cpu_has_apic &&
++                     ((!directed_eoi_enabled && x86_match_cpu(eoi_errata)) ||
++                      x86_match_cpu(isr_errata));
+     }
+ 
+     return (fix_needed && cpu_has_pending_apic_eoi());
+@@ -673,7 +703,7 @@ static void acpi_processor_idle(void)
+         return;
+     }
+ 
+-    if ( (cx->type >= ACPI_STATE_C3) && errata_c6_eoi_workaround() )
++    if ( (cx->type >= ACPI_STATE_C3) && errata_c6_workaround() )
+         cx = power->safe_state;
+ 
+ 
+--- a/xen/arch/x86/cpu/mwait-idle.c
++++ b/xen/arch/x86/cpu/mwait-idle.c
+@@ -769,7 +769,7 @@ static void mwait_idle(void)
+ 		return;
+ 	}
+ 
+-	if ((cx->type >= 3) && errata_c6_eoi_workaround())
++	if ((cx->type >= 3) && errata_c6_workaround())
+ 		cx = power->safe_state;
+ 
+ 	eax = cx->address;
+--- a/xen/include/asm-x86/cpuidle.h
++++ b/xen/include/asm-x86/cpuidle.h
+@@ -26,6 +26,6 @@ void update_idle_stats(struct acpi_proce
+ void update_last_cx_stat(struct acpi_processor_power *,
+                          struct acpi_processor_cx *, uint64_t);
+ 
+-bool errata_c6_eoi_workaround(void);
++bool errata_c6_workaround(void);
+ 
+ #endif /* __X86_ASM_CPUIDLE_H__ */