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-rw-r--r--5f21b9fd-x86-cpuid-APIC-bit-clearing.patch25
1 files changed, 25 insertions, 0 deletions
diff --git a/5f21b9fd-x86-cpuid-APIC-bit-clearing.patch b/5f21b9fd-x86-cpuid-APIC-bit-clearing.patch
new file mode 100644
index 0000000..ae96985
--- /dev/null
+++ b/5f21b9fd-x86-cpuid-APIC-bit-clearing.patch
@@ -0,0 +1,25 @@
+# Commit 64219fa179c3e48adad12bfce3f6b3f1596cccbf
+# Date 2020-07-29 19:03:41 +0100
+# Author Fam Zheng <famzheng@amazon.com>
+# Committer Andrew Cooper <andrew.cooper3@citrix.com>
+x86/cpuid: Fix APIC bit clearing
+
+The bug is obvious here, other places in this function used
+"cpufeat_mask" correctly.
+
+Fixed: b648feff8ea2 ("xen/x86: Improvements to in-hypervisor cpuid sanity checks")
+Signed-off-by: Fam Zheng <famzheng@amazon.com>
+Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
+Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
+
+--- a/xen/arch/x86/cpuid.c
++++ b/xen/arch/x86/cpuid.c
+@@ -961,7 +961,7 @@ void guest_cpuid(const struct vcpu *v, u
+ {
+ /* Fast-forward MSR_APIC_BASE.EN. */
+ if ( vlapic_hw_disabled(vcpu_vlapic(v)) )
+- res->d &= ~cpufeat_bit(X86_FEATURE_APIC);
++ res->d &= ~cpufeat_mask(X86_FEATURE_APIC);
+
+ /*
+ * PSE36 is not supported in shadow mode. This bit should be