From c22f60e6e55f1bf300dd76d2222a93911f3b2bb2 Mon Sep 17 00:00:00 2001 From: CoprDistGit Date: Thu, 12 Oct 2023 04:00:49 +0000 Subject: automatic import of xen --- 5f21b9fd-x86-cpuid-APIC-bit-clearing.patch | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 5f21b9fd-x86-cpuid-APIC-bit-clearing.patch (limited to '5f21b9fd-x86-cpuid-APIC-bit-clearing.patch') diff --git a/5f21b9fd-x86-cpuid-APIC-bit-clearing.patch b/5f21b9fd-x86-cpuid-APIC-bit-clearing.patch new file mode 100644 index 0000000..ae96985 --- /dev/null +++ b/5f21b9fd-x86-cpuid-APIC-bit-clearing.patch @@ -0,0 +1,25 @@ +# Commit 64219fa179c3e48adad12bfce3f6b3f1596cccbf +# Date 2020-07-29 19:03:41 +0100 +# Author Fam Zheng +# Committer Andrew Cooper +x86/cpuid: Fix APIC bit clearing + +The bug is obvious here, other places in this function used +"cpufeat_mask" correctly. + +Fixed: b648feff8ea2 ("xen/x86: Improvements to in-hypervisor cpuid sanity checks") +Signed-off-by: Fam Zheng +Reviewed-by: Roger Pau Monné +Reviewed-by: Andrew Cooper + +--- a/xen/arch/x86/cpuid.c ++++ b/xen/arch/x86/cpuid.c +@@ -961,7 +961,7 @@ void guest_cpuid(const struct vcpu *v, u + { + /* Fast-forward MSR_APIC_BASE.EN. */ + if ( vlapic_hw_disabled(vcpu_vlapic(v)) ) +- res->d &= ~cpufeat_bit(X86_FEATURE_APIC); ++ res->d &= ~cpufeat_mask(X86_FEATURE_APIC); + + /* + * PSE36 is not supported in shadow mode. This bit should be -- cgit v1.2.3