diff options
Diffstat (limited to '0025-AArch64-Rewrite-the-tsv110-option.patch')
| -rw-r--r-- | 0025-AArch64-Rewrite-the-tsv110-option.patch | 114 |
1 files changed, 114 insertions, 0 deletions
diff --git a/0025-AArch64-Rewrite-the-tsv110-option.patch b/0025-AArch64-Rewrite-the-tsv110-option.patch new file mode 100644 index 0000000..d2e0dcd --- /dev/null +++ b/0025-AArch64-Rewrite-the-tsv110-option.patch @@ -0,0 +1,114 @@ +From 2f0d0b1298fb9c3266bb102796b027a5570ad833 Mon Sep 17 00:00:00 2001 +From: dingguangya <dingguangya1@huawei.com> +Date: Mon, 4 Sep 2023 16:27:38 +0800 +Subject: [PATCH 1/2] [AArch64] Rewrite the tsv110 option + +Reset the more appropriate options for tsv110. +--- + gcc/common/config/aarch64/aarch64-common.cc | 76 +++++++++++++++++++++ + 1 file changed, 76 insertions(+) + +diff --git a/gcc/common/config/aarch64/aarch64-common.cc b/gcc/common/config/aarch64/aarch64-common.cc +index dfda5b837..85ce8133b 100644 +--- a/gcc/common/config/aarch64/aarch64-common.cc ++++ b/gcc/common/config/aarch64/aarch64-common.cc +@@ -44,6 +44,8 @@ + #undef TARGET_OPTION_INIT_STRUCT + #define TARGET_OPTION_INIT_STRUCT aarch64_option_init_struct + ++#define INVALID_IMP ((unsigned) -1) ++ + /* Set default optimization options. */ + static const struct default_options aarch_option_optimization_table[] = + { +@@ -65,6 +67,77 @@ static const struct default_options aarch_option_optimization_table[] = + { OPT_LEVELS_NONE, 0, NULL, 0 } + }; + ++/* CPU vendor id. */ ++static unsigned vendor_id = INVALID_IMP; ++ ++/* The part number of the CPU. */ ++static unsigned part_id = INVALID_IMP; ++ ++/* Return the hex integer that is after ':' for the FIELD. ++ Return -1 if there was problem parsing the integer. */ ++static unsigned ++parse_cpuinfo (char *field) ++{ ++ if (field == NULL) ++ return INVALID_IMP; ++ const char *rest = strchr (field, ':'); ++ ++ if (rest == NULL) ++ return INVALID_IMP; ++ ++ char *after; ++ unsigned fint = strtol (rest + 1, &after, 16); ++ if (after == rest + 1) ++ return INVALID_IMP; ++ return fint; ++} ++ ++/* Read CPU vendor_id and part_id. */ ++ ++static void ++read_cpuinfo () ++{ ++ FILE *fp = fopen ("/proc/cpuinfo", "r"); ++ if (fp == NULL) ++ return; ++ ++ /* Read 1024-byte data from /proc/cpuinfo. */ ++ char cpuinfo[1024]; ++ fread(cpuinfo, sizeof(char), sizeof(cpuinfo) - 1, fp); ++ ++ char *vendor = strstr(cpuinfo, "CPU implementer"); ++ vendor_id = parse_cpuinfo(vendor); ++ ++ char *part = strstr(cpuinfo, "CPU part"); ++ part_id = parse_cpuinfo(part); ++ ++ fclose(fp); ++} ++ ++/* Reset the tsv110 option. After checking the platform information, ++ this function can reset the more appropriate options. ++ TODO: Currently, this function is not applicable to the cross ++ compilation scenario. */ ++ ++static void ++reset_tsv110_option () ++{ ++ /* Read CPU Information. */ ++ if (vendor_id == INVALID_IMP) ++ read_cpuinfo (); ++ ++ if (vendor_id == 0x48 && part_id == 0xd01) ++ { ++ /* Outline-atomics is enabled by default and ++ aarch64_flag_outline_atomics defaults to 2. Therefore, the current ++ modification affects only the default scenario. When the option ++ moutline-atomics is added, the value of aarch64_flag_outline_atomics is 1, ++ that is, aarch64_flag_outline_atomics is not reset to 0. */ ++ if (aarch64_flag_outline_atomics == 2) ++ aarch64_flag_outline_atomics = 0; ++ } ++} ++ + /* Implement TARGET_HANDLE_OPTION. + This function handles the target specific options for CPU/target selection. + +@@ -83,6 +156,9 @@ aarch64_handle_option (struct gcc_options *opts, + const char *arg = decoded->arg; + int val = decoded->value; + ++ /* Reset the tsv110 options. */ ++ reset_tsv110_option (); ++ + switch (code) + { + case OPT_march_: +-- +2.33.0 + |