diff options
Diffstat (limited to '0127-Backport-SME-Add-Ampere-1-and-Ampere-1A-core-definit.patch')
| -rw-r--r-- | 0127-Backport-SME-Add-Ampere-1-and-Ampere-1A-core-definit.patch | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/0127-Backport-SME-Add-Ampere-1-and-Ampere-1A-core-definit.patch b/0127-Backport-SME-Add-Ampere-1-and-Ampere-1A-core-definit.patch new file mode 100644 index 0000000..d317791 --- /dev/null +++ b/0127-Backport-SME-Add-Ampere-1-and-Ampere-1A-core-definit.patch @@ -0,0 +1,29 @@ +From f6b2917888292c694bae1debe8abb0d6c2c6f59e Mon Sep 17 00:00:00 2001 +From: xiezhiheng <xiezhiheng@huawei.com> +Date: Tue, 20 Feb 2024 11:03:47 +0800 +Subject: [PATCH 028/157] [Backport][SME] Add Ampere-1 and Ampere-1A core + definition in aarch64-cores.def + +From commit db2f5d661239737157cf131de7d4df1c17d8d88d and +590a06afbf0e96813b5879742f38f3665512c854 +--- + gcc/config/aarch64/aarch64-cores.def | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def +index b50628d6b..f069c81cf 100644 +--- a/gcc/config/aarch64/aarch64-cores.def ++++ b/gcc/config/aarch64/aarch64-cores.def +@@ -69,7 +69,8 @@ AARCH64_CORE("thunderxt81", thunderxt81, thunderx, V8A, (CRC, CRYPTO), thu + AARCH64_CORE("thunderxt83", thunderxt83, thunderx, V8A, (CRC, CRYPTO), thunderx, 0x43, 0x0a3, -1) + + /* Ampere Computing ('\xC0') cores. */ +-AARCH64_CORE("ampere1", ampere1, cortexa57, V8_6A, (), ampere1, 0xC0, 0xac3, -1) ++AARCH64_CORE("ampere1", ampere1, cortexa57, V8_6A, (F16, RNG, AES, SHA3), ampere1, 0xC0, 0xac3, -1) ++AARCH64_CORE("ampere1a", ampere1a, cortexa57, V8_6A, (F16, RNG, AES, SHA3, MEMTAG), ampere1a, 0xC0, 0xac4, -1) + /* Do not swap around "emag" and "xgene1", + this order is required to handle variant correctly. */ + AARCH64_CORE("emag", emag, xgene1, V8A, (CRC, CRYPTO), emag, 0x50, 0x000, 3) +-- +2.33.0 + |