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From d13efe98cafa04aeb24f8e0f695e648887986228 Mon Sep 17 00:00:00 2001
From: Wilco Dijkstra <wilco.dijkstra@arm.com>
Date: Wed, 7 Dec 2022 14:16:24 +0000
Subject: [PATCH 139/157] [Backport][SME] AArch64: Fix assert in
aarch64_move_imm [PR108006]
Reference: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=952c8a1dc6235dc49ab207a7f18f63d2bc97fbc9
Ensure we only pass SI/DImode which fixes the assert.
gcc/
PR target/108006
* config/aarch64/aarch64.cc (aarch64_expand_sve_const_vector):
Fix call to aarch64_move_imm to use SI/DI.
---
gcc/config/aarch64/aarch64.cc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 0117a3e12..309ecc3d9 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -7925,7 +7925,8 @@ aarch64_expand_sve_const_vector (rtx target, rtx src)
/* If the integer can be moved into a general register by a
single instruction, do that and duplicate the result. */
if (CONST_INT_P (elt_value)
- && aarch64_move_imm (INTVAL (elt_value), elt_mode))
+ && aarch64_move_imm (INTVAL (elt_value),
+ encoded_bits <= 32 ? SImode : DImode))
{
elt_value = force_reg (elt_mode, elt_value);
return expand_vector_broadcast (mode, elt_value);
--
2.33.0
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