automatic import of perftestopeneuler24.03_LTS

14 files changed, 1051 insertions, 0 deletions

diff --git a/.gitignore b/.gitignore
index e69de29..f86d3a4 100644
--- a/.gitignore
+++ b/.gitignore
@@ -0,0 +1 @@
+/perftest-4.5-0.12.ge93c538.tar.gz
diff --git a/0001-perftest_parameters-Add-inline-feature-support-of-ER.patch b/0001-perftest_parameters-Add-inline-feature-support-of-ER.patch
new file mode 100644
index 0000000..64f4334
--- /dev/null
+++ b/0001-perftest_parameters-Add-inline-feature-support-of-ER.patch
@@ -0,0 +1,49 @@
+From 7389878920aba23a6b86a376a601bacd03ca9f41 Mon Sep 17 00:00:00 2001
+From: Cheng Xu <chengyou@linux.alibaba.com>
+Date: Wed, 26 Oct 2022 10:39:10 +0800
+Subject: perftest_parameters: Add inline feature support of ERDMA device
+
+Let perftest recognize ERDMA device and set the correct max inline size.
+
+Signed-off-by: Cheng Xu <chengyou@linux.alibaba.com>
+---
+ src/perftest_parameters.c | 3 +++
+ src/perftest_parameters.h | 1 +
+ 2 files changed, 4 insertions(+)
+
+diff --git a/src/perftest_parameters.c b/src/perftest_parameters.c
+index 448592a..1d26e4f 100755
+--- a/src/perftest_parameters.c
++++ b/src/perftest_parameters.c
+@@ -1865,6 +1865,7 @@ enum ctx_device ib_dev_name(struct ibv_context *context)
+ 			case 55300 : dev_fname = NETXTREME; break;
+ 			case 61344 : dev_fname = EFA; break;
+ 			case 61345 : dev_fname = EFA; break;
++			case 4223  : dev_fname = ERDMA; break;
+ 			default	   : dev_fname = UNKNOWN;
+ 		}
+ 	}
+@@ -2036,6 +2037,8 @@ static void ctx_set_max_inline(struct ibv_context *context,struct perftest_param
+ 				user_param->inline_size = 32;
+ 			else if (current_dev == QLOGIC_E4)
+ 				user_param->inline_size = 128;
++			else if (current_dev == ERDMA)
++				user_param->inline_size = 96;
+ 
+ 		} else {
+ 			user_param->inline_size = 0;
+diff --git a/src/perftest_parameters.h b/src/perftest_parameters.h
+index dcf6214..bfd42f0 100755
+--- a/src/perftest_parameters.h
++++ b/src/perftest_parameters.h
+@@ -333,6 +333,7 @@ enum ctx_device {
+ 	CONNECTX7		= 26,
+ 	QLOGIC_AHP		= 27,
+ 	BLUEFIELD3		= 28,
++	ERDMA			= 29,
+ };
+ 
+ /* Units for rate limiter */
+-- 
+2.34.1
+
diff --git a/0002-Perftest-replace-rand-with-getrandom-during-MR-buffe.patch b/0002-Perftest-replace-rand-with-getrandom-during-MR-buffe.patch
new file mode 100644
index 0000000..40a196f
--- /dev/null
+++ b/0002-Perftest-replace-rand-with-getrandom-during-MR-buffe.patch
@@ -0,0 +1,145 @@
+From 6d8f1feed063e04d0419c0d895e919a24c7c24d4 Mon Sep 17 00:00:00 2001
+From: Chengchang Tang <tangchengchang@huawei.com>
+Date: Tue, 8 Nov 2022 20:20:44 +0800
+Subject: Perftest: replace rand() with getrandom() during MR buffer
+ initialization
+
+rand() has very poor performance in some OS.
+
+ib_send_bw will spend a lot of time during MR initialization when
+testing large packects in above scenario.
+
+test has been done:
+"""
+\#define HUGE_MR_SIZE 2147483647
+int main(int argc, char *argv[])
+{
+        char *a = malloc(HUGE_MR_SIZE * sizeof(char));
+        unsigned int i;
+        char *tmp = a;
+        int ret;
+
+        srand(time(NULL));
+        if (a == NULL)
+                exit(1);
+
+        if (argc <= 1)
+                goto fall_back;
+
+        for (i = HUGE_MR_SIZE; i > 0;) {
+                ret = getrandom(tmp, i, 0);
+                if (ret < 0)
+                        goto fall_back;
+                tmp += ret;
+                i -= ret;
+        }
+        goto out;
+
+fall_back:
+        for(i = 0; i < HUGE_MR_SIZE; i++)
+                a[i] = (char)rand();
+out:
+        free(a);
+        return 0;
+}
+
+time ./a.out
+real    5m35.033s
+user    5m33.546s
+sys     0m0.918s
+
+time ./a.out 1
+
+real    0m6.454s
+user    0m0.000s
+sys     0m6.449s
+"""
+
+As shown in the test above, getrandom() has a much better performance,
+so replace rand() with it.
+
+Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
+---
+ configure.ac             |  1 +
+ src/perftest_resources.c | 31 ++++++++++++++++++++++++++-----
+ 2 files changed, 27 insertions(+), 5 deletions(-)
+
+diff --git a/configure.ac b/configure.ac
+index 21a17bc..2bbc7fc 100755
+--- a/configure.ac
++++ b/configure.ac
+@@ -60,6 +60,7 @@ AC_PROG_LIBTOOL
+ AC_PROG_RANLIB
+ AC_HEADER_STDC
+ AC_CHECK_HEADERS([infiniband/verbs.h],,[AC_MSG_ERROR([ibverbs header files not found])])
++AC_CHECK_HEADERS([sys/random.h],,)
+ AC_CHECK_LIB([ibverbs], [ibv_get_device_list], [], [AC_MSG_ERROR([libibverbs not found])])
+ AC_CHECK_LIB([rdmacm], [rdma_create_event_channel], [], AC_MSG_ERROR([librdmacm-devel not found]))
+ AC_CHECK_LIB([ibumad], [umad_init], [LIBUMAD=-libumad], AC_MSG_ERROR([libibumad not found]))
+diff --git a/src/perftest_resources.c b/src/perftest_resources.c
+index 33db58e..23c31d1 100755
+--- a/src/perftest_resources.c
++++ b/src/perftest_resources.c
+@@ -22,6 +22,9 @@
+ #ifdef HAVE_CONFIG_H
+ #include <config.h>
+ #endif
++#ifdef HAVE_SYS_RANDOM_H
++#include <sys/random.h>
++#endif
+ #ifdef HAVE_SRD
+ #include <infiniband/efadv.h>
+ #endif
+@@ -1542,12 +1545,33 @@ int create_cqs(struct pingpong_context *ctx, struct perftest_parameters *user_pa
+ 	return ret;
+ }
+ 
++static void random_data(char *buf, int buff_size)
++{
++	int i;
++#ifdef HAVE_SYS_RANDOM_H
++	char *tmp = buf;
++	int ret;
++
++	for(i = buff_size; i > 0;) {
++		ret = getrandom(tmp, i, 0);
++		if(ret < 0)
++			goto fall_back;
++		tmp += ret;
++		i -= ret;
++	}
++	return;
++fall_back:
++#endif
++	srand(time(NULL));
++	for (i = 0; i < buff_size; i++)
++		buf[i] = (char)rand();
++}
++
+ /******************************************************************************
+  *
+  ******************************************************************************/
+ int create_single_mr(struct pingpong_context *ctx, struct perftest_parameters *user_param, int qp_index)
+ {
+-	int i;
+ 	int flags = IBV_ACCESS_LOCAL_WRITE;
+ 
+ 
+@@ -1686,13 +1710,10 @@ int create_single_mr(struct pingpong_context *ctx, struct perftest_parameters *u
+ #ifdef HAVE_CUDA
+ 	if (!user_param->use_cuda) {
+ #endif
+-		srand(time(NULL));
+ 		if (user_param->verb == WRITE && user_param->tst == LAT) {
+ 			memset(ctx->buf[qp_index], 0, ctx->buff_size);
+ 		} else {
+-			for (i = 0; i < ctx->buff_size; i++) {
+-				((char*)ctx->buf[qp_index])[i] = (char)rand();
+-			}
++			random_data(ctx->buf[qp_index], ctx->buff_size);
+ 		}
+ #ifdef HAVE_CUDA
+ 	}
+-- 
+2.34.1
+
diff --git a/0003-Perftest-Fix-verification-of-max_inline_data-for-_cr.patch b/0003-Perftest-Fix-verification-of-max_inline_data-for-_cr.patch
new file mode 100644
index 0000000..1982a5e
--- /dev/null
+++ b/0003-Perftest-Fix-verification-of-max_inline_data-for-_cr.patch
@@ -0,0 +1,75 @@
+From 1a842d207a981c72c5162f4efd89da8c5a07a772 Mon Sep 17 00:00:00 2001
+From: Chengchang Tang <tangchengchang@huawei.com>
+Date: Tue, 8 Nov 2022 20:20:40 +0800
+Subject: Perftest: Fix verification of max_inline_data for *_create_qp_ex()
+
+Currently, attr.cap.max_inline_data is used for validation in
+*_create_qp() and *_create_qp_ex(). But actually, when entering
+the create_qp_ex path, the variable attr is not used. So the current
+check of the *_create_qp_ex() branch is meaningless.
+
+The attr_ex.cap.max_inline_data is used to check the max_inline_data
+in *_create_qp_ex() path. And related printing error has also been
+fixed.
+
+Fixes: 13f71777e6f0 ("Added new post_send API usage for RC,UC,UD,XRC")
+Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
+---
+ src/perftest_resources.c | 24 ++++++++++++++----------
+ 1 file changed, 14 insertions(+), 10 deletions(-)
+
+diff --git a/src/perftest_resources.c b/src/perftest_resources.c
+index 23c31d1..751ea96 100755
+--- a/src/perftest_resources.c
++++ b/src/perftest_resources.c
+@@ -2138,22 +2138,21 @@ struct ibv_qp* ctx_qp_create(struct pingpong_context *ctx,
+ 	int dc_num_of_qps = user_param->num_of_qps / 2;
+ 
+ 	int is_dc_server_side = 0;
++	struct ibv_qp_init_attr attr;
++	memset(&attr, 0, sizeof(struct ibv_qp_init_attr));
++	struct ibv_qp_cap *qp_cap = &attr.cap;
++
+ 	#ifdef HAVE_IBV_WR_API
+ 	enum ibv_wr_opcode opcode;
+-	struct ibv_qp_init_attr attr;
+ 	struct ibv_qp_init_attr_ex attr_ex;
++	memset(&attr_ex, 0, sizeof(struct ibv_qp_init_attr_ex));
+ 	#ifdef HAVE_MLX5DV
+ 	struct mlx5dv_qp_init_attr attr_dv;
+ 	memset(&attr_dv, 0, sizeof(attr_dv));
+ 	#endif
+-	memset(&attr, 0, sizeof(struct ibv_qp_init_attr));
+-	memset(&attr_ex, 0, sizeof(struct ibv_qp_init_attr_ex));
+ 	#ifdef HAVE_SRD
+ 	struct efadv_qp_init_attr efa_attr = {};
+ 	#endif
+-	#else
+-	struct ibv_qp_init_attr attr;
+-	memset(&attr, 0, sizeof(struct ibv_qp_init_attr));
+ 	#endif
+ 
+ 	attr.send_cq = ctx->send_cq;
+@@ -2328,10 +2327,15 @@ struct ibv_qp* ctx_qp_create(struct pingpong_context *ctx,
+ 		fprintf(stderr, "Current TX depth is %d and inline size is %d .\n", user_param->tx_depth, user_param->inline_size);
+ 	}
+ 
+-	if (user_param->inline_size > attr.cap.max_inline_data) {
+-		user_param->inline_size = attr.cap.max_inline_data;
+-		printf("  Actual inline-size(%d) > requested inline-size(%d)\n",
+-			attr.cap.max_inline_data, user_param->inline_size);
++	#ifdef HAVE_IBV_WR_API
++	if (!user_param->use_old_post_send)
++		qp_cap = &attr_ex.cap;
++	#endif
++
++	if (user_param->inline_size > qp_cap->max_inline_data) {
++		printf("  Actual inline-size(%d) < requested inline-size(%d)\n",
++			qp_cap->max_inline_data, user_param->inline_size);
++		user_param->inline_size = qp_cap->max_inline_data;
+ 	}
+ 
+ 	return qp;
+-- 
+2.34.1
+
diff --git a/0004-Perftest-Increase-max-inline-size-to-support-larger-.patch b/0004-Perftest-Increase-max-inline-size-to-support-larger-.patch
new file mode 100644
index 0000000..1f55d67
--- /dev/null
+++ b/0004-Perftest-Increase-max-inline-size-to-support-larger-.patch
@@ -0,0 +1,33 @@
+From f1d3612de51294cf1d9eab3487fc11c37ffe1386 Mon Sep 17 00:00:00 2001
+From: Chengchang Tang <tangchengchang@huawei.com>
+Date: Tue, 8 Nov 2022 20:20:43 +0800
+Subject: Perftest: Increase max inline size to support larger inline tests
+
+For some hns roce devices, a maximum of 1024 bytes of inline is
+supported.
+
+So, increate the MAX_INLINE and MAX_INLINE_UD to support related test.
+
+Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
+---
+ src/perftest_parameters.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/perftest_parameters.h b/src/perftest_parameters.h
+index bfd42f0..9a4d2bb 100755
+--- a/src/perftest_parameters.h
++++ b/src/perftest_parameters.h
+@@ -177,8 +177,8 @@
+ #define UC_MAX_RX     (16000)
+ #define MIN_CQ_MOD    (1)
+ #define MAX_CQ_MOD    (1024)
+-#define MAX_INLINE    (912)
+-#define MAX_INLINE_UD (884)
++#define MAX_INLINE    (1024)
++#define MAX_INLINE_UD (1024)
+ #define MIN_EQ_NUM    (0)
+ #define MAX_EQ_NUM    (2048)
+ 
+-- 
+2.34.1
+
diff --git a/0005-Perftest-Add-support-for-HNS.patch b/0005-Perftest-Add-support-for-HNS.patch
new file mode 100644
index 0000000..8694362
--- /dev/null
+++ b/0005-Perftest-Add-support-for-HNS.patch
@@ -0,0 +1,72 @@
+From 3dcb9a00f4f92bfb842ff7b670f1fd2b30bbf89a Mon Sep 17 00:00:00 2001
+From: Chengchang Tang <tangchengchang@huawei.com>
+Date: Tue, 8 Nov 2022 20:20:41 +0800
+Subject: Perftest: Add support for HNS
+
+Add support for HNS device by making it recognized by perftest.
+Make the perftest allow testing new post send method for hns roce.
+And a suitable default inline data size is applied.
+
+Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
+---
+ src/perftest_parameters.c | 9 +++++++++
+ src/perftest_parameters.h | 1 +
+ src/perftest_resources.c  | 3 ++-
+ 3 files changed, 12 insertions(+), 1 deletion(-)
+
+diff --git a/src/perftest_parameters.c b/src/perftest_parameters.c
+index 1d26e4f..9c49265 100755
+--- a/src/perftest_parameters.c
++++ b/src/perftest_parameters.c
+@@ -1866,6 +1866,13 @@ enum ctx_device ib_dev_name(struct ibv_context *context)
+ 			case 61344 : dev_fname = EFA; break;
+ 			case 61345 : dev_fname = EFA; break;
+ 			case 4223  : dev_fname = ERDMA; break;
++			case 41506 : dev_fname = HNS; break;
++			case 41507 : dev_fname = HNS; break;
++			case 41508 : dev_fname = HNS; break;
++			case 41509 : dev_fname = HNS; break;
++			case 41510 : dev_fname = HNS; break;
++			case 41512 : dev_fname = HNS; break;
++			case 41519 : dev_fname = HNS; break;
+ 			default	   : dev_fname = UNKNOWN;
+ 		}
+ 	}
+@@ -2039,6 +2046,8 @@ static void ctx_set_max_inline(struct ibv_context *context,struct perftest_param
+ 				user_param->inline_size = 128;
+ 			else if (current_dev == ERDMA)
+ 				user_param->inline_size = 96;
++			else if (current_dev == HNS)
++				user_param->inline_size = 32;
+ 
+ 		} else {
+ 			user_param->inline_size = 0;
+diff --git a/src/perftest_parameters.h b/src/perftest_parameters.h
+index 9a4d2bb..909d771 100755
+--- a/src/perftest_parameters.h
++++ b/src/perftest_parameters.h
+@@ -334,6 +334,7 @@ enum ctx_device {
+ 	QLOGIC_AHP		= 27,
+ 	BLUEFIELD3		= 28,
+ 	ERDMA			= 29,
++	HNS			= 30,
+ };
+ 
+ /* Units for rate limiter */
+diff --git a/src/perftest_resources.c b/src/perftest_resources.c
+index 751ea96..bcec080 100755
+--- a/src/perftest_resources.c
++++ b/src/perftest_resources.c
+@@ -1818,7 +1818,8 @@ int verify_params_with_device_context(struct ibv_context *context,
+ 		current_dev != BLUEFIELD &&
+ 		current_dev != BLUEFIELD2 &&
+ 		current_dev != BLUEFIELD3 &&
+-		current_dev != EFA)
++		current_dev != EFA &&
++		current_dev != HNS)
+ 	{
+ 		if (!user_param->use_old_post_send)
+ 		{
+-- 
+2.34.1
+
diff --git a/0006-Perftest-Add-new-HNS-roce-device-ROH-to-support-new_.patch b/0006-Perftest-Add-new-HNS-roce-device-ROH-to-support-new_.patch
new file mode 100644
index 0000000..ad65076
--- /dev/null
+++ b/0006-Perftest-Add-new-HNS-roce-device-ROH-to-support-new_.patch
@@ -0,0 +1,29 @@
+From 3ded8d702bf95186cd2ddbae7e3c23bfd1aa9d31 Mon Sep 17 00:00:00 2001
+From: Chengchang Tang <tangchengchang@huawei.com>
+Date: Mon, 7 Nov 2022 16:09:42 +0800
+Subject: Perftest: Add new HNS roce device (ROH) to support new_io
+
+Add ROH device id.
+
+Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
+---
+ src/perftest_parameters.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/src/perftest_parameters.c b/src/perftest_parameters.c
+index 9c49265..034a20e 100755
+--- a/src/perftest_parameters.c
++++ b/src/perftest_parameters.c
+@@ -1873,6 +1873,9 @@ enum ctx_device ib_dev_name(struct ibv_context *context)
+ 			case 41510 : dev_fname = HNS; break;
+ 			case 41512 : dev_fname = HNS; break;
+ 			case 41519 : dev_fname = HNS; break;
++			case 41511 : dev_fname = HNS; break;
++			case 41516 : dev_fname = HNS; break;
++			case 41517 : dev_fname = HNS; break;
+ 			default	   : dev_fname = UNKNOWN;
+ 		}
+ 	}
+-- 
+2.34.1
+
diff --git a/0007-add-loongarch-support-for-perftest.patch b/0007-add-loongarch-support-for-perftest.patch
new file mode 100644
index 0000000..515f8bf
--- /dev/null
+++ b/0007-add-loongarch-support-for-perftest.patch
@@ -0,0 +1,35 @@
+From 9600d3bae7e8f116aff303df7e13f23e67274096 Mon Sep 17 00:00:00 2001
+From: Wenlong Zhang <zhangwenlong@loongson.cn>
+Date: Sat, 7 Jan 2023 03:23:20 +0000
+Subject: [PATCH] add loongarch support for perftest
+
+add function get_cycles for loongarch64
+
+Signed-off-by: Wenlong Zhang <zhangwenlong@loongson.cn>
+---
+ src/get_clock.h | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/src/get_clock.h b/src/get_clock.h
+index dacbcd0..5b7b48b 100755
+--- a/src/get_clock.h
++++ b/src/get_clock.h
+@@ -105,6 +105,15 @@ static inline cycles_t get_cycles()
+ 	return cval;
+ }
+ 
++#elif defined(__loongarch64)
++typedef unsigned long cycles_t;
++static inline cycles_t get_cycles()
++{
++       cycles_t count;
++       asm volatile("rdtime.d %0, $zero" : "=r" (count));
++       return count;
++}
++
+ #else
+ #warning get_cycles not implemented for this architecture: attempt asm/timex.h
+ #include <asm/timex.h>
+-- 
+2.33.0
+
diff --git a/0008-Get-CPU-MHz-on-RISC-V.patch b/0008-Get-CPU-MHz-on-RISC-V.patch
new file mode 100644
index 0000000..6cfeea4
--- /dev/null
+++ b/0008-Get-CPU-MHz-on-RISC-V.patch
@@ -0,0 +1,40 @@
+From 08d1c895359c89ff16e85bc86dbe66fe47c90274 Mon Sep 17 00:00:00 2001
+From: "v.v.mitrofanov" <v.v.mitrofanov@yadro.com>
+Date: Mon, 31 Jan 2022 13:09:57 +0300
+Subject: [PATCH 1/2] Get CPU MHz on RISC-V
+
+This test needs to know current CPU MHz value to output test results correctly.
+This patch set a CPU MHz value in case of using RISC-V arch.
+
+get_cpu_mhz() tries to acquire CPU MHz value from /proc/cpuinfo for
+some arches. It is not possible to get CPU MHz value from
+/proc/cpuinfo on RISC-V. It returns always 0. But it is possible to
+get this value calculated on cpu cycles. Use CPU cycles value calculated
+in sample_get_cpu_mhz();
+
+This patch is tested on SiFive HiFive Unmatched board.
+
+Signed-off-by: v.v.mitrofanov <v.v.mitrofanov@yadro.com>
+---
+ src/get_clock.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/src/get_clock.c b/src/get_clock.c
+index acdc6f1..78ad865 100755
+--- a/src/get_clock.c
++++ b/src/get_clock.c
+@@ -222,6 +222,11 @@ double get_cpu_mhz(int no_cpu_freq_warn)
+ 	if (proc < 1)
+ 		proc = sample;
+ 	#endif
++	#ifdef __riscv
++	if (proc <= 0)
++		proc = sample;
++	#endif
++
+ 	if (!proc || !sample)
+ 		return 0;
+ 
+-- 
+2.40.1
+
diff --git a/0009-Get-CPU-cycles-on-RISC-V.patch b/0009-Get-CPU-cycles-on-RISC-V.patch
new file mode 100644
index 0000000..1137b45
--- /dev/null
+++ b/0009-Get-CPU-cycles-on-RISC-V.patch
@@ -0,0 +1,116 @@
+From df20eb17a10aa4c930887c92a4d5a3832402a096 Mon Sep 17 00:00:00 2001
+From: "v.v.mitrofanov" <v.v.mitrofanov@yadro.com>
+Date: Mon, 31 Jan 2022 13:41:30 +0300
+Subject: [PATCH 2/2] Get CPU cycles on RISC-V
+
+This test acquires CPU cycles to perform output calculations
+and get timestamps. There is no cpu_cycles() implementation on RISC-V arch.
+
+This patch gets cycles using perf events.
+One of the most notable reasons to use perf event instead of
+reading counter registers is to avoid modifying MUCOUNTEREN
+register. Due to the RISC-V ISA specification (riscv-privileged-v1.9)
+before getting any access to counter registers it is necessary to enable it in MUCOUNTEREN in a privileged mode. On the other hand,
+perf events are free to use.
+
+This patch is tested on the SiFive HiFive Unmatched board.
+
+Signed-off-by: v.v.mitrofanov <v.v.mitrofanov@yadro.com>
+---
+ src/get_clock.c | 62 +++++++++++++++++++++++++++++++++++++++++++++++++
+ src/get_clock.h |  9 +++++++
+ 2 files changed, 71 insertions(+)
+
+diff --git a/src/get_clock.c b/src/get_clock.c
+index 78ad865..c6adbdc 100755
+--- a/src/get_clock.c
++++ b/src/get_clock.c
+@@ -237,3 +237,65 @@ double get_cpu_mhz(int no_cpu_freq_warn)
+ 	return proc;
+ #endif
+ }
++
++#if defined(__riscv)
++#include <stdlib.h>
++#include <stdio.h>
++#include <unistd.h>
++#include <string.h>
++#include <sys/syscall.h>
++#include <linux/perf_event.h>
++#include <asm/unistd.h>
++
++static long perf_event_open(struct perf_event_attr *hw_event,
++		pid_t pid, int cpu, int group_fd,
++		unsigned long flags)
++{
++	return syscall(__NR_perf_event_open, hw_event, pid,
++			cpu, group_fd, flags);
++}
++
++cycles_t perf_get_cycles()
++{
++	cycles_t cycles = 0;
++	struct perf_event_attr pe;
++	const pid_t pid = 0;		// Current task
++	const int cpu = -1;  		// On any CPU
++	const int group_fd = -1;	// Use leader group
++	const unsigned long flags = 0;
++	/* Use this variable just to open perf event here and once.
++	   It is appropriate because it touches only this function and
++	   not fix other code */
++	static int is_open = 0;
++	/* Make file discriptor static just to keep it valid during
++	   programm execution. It will be closed automatically when
++	   test finishes. It is a hack just not to fix other part of test */
++        static int fd = -1;
++
++	if (!is_open) {
++		memset(&pe, 0, sizeof(pe));
++
++		pe.type = PERF_TYPE_HARDWARE;
++		pe.size = sizeof(pe);
++		pe.config = PERF_COUNT_HW_CPU_CYCLES;
++		pe.disabled = 0;
++		pe.exclude_kernel = 0;
++		pe.exclude_hv = 0;
++
++		fd = perf_event_open(&pe, pid, cpu, group_fd, flags);
++		if (fd == -1) {
++			fprintf(stderr, "Error opening perf event (%llx)\n", pe.config);
++			exit(EXIT_FAILURE);
++		}
++
++		is_open = 1;
++	}
++
++	if(read(fd, &cycles, sizeof(cycles)) < 0) {
++		fprintf(stderr, "Error reading perf event (%llx)\n", pe.config);
++		exit(EXIT_FAILURE);
++	}
++
++	return cycles;
++}
++#endif
+diff --git a/src/get_clock.h b/src/get_clock.h
+index dacbcd0..97c3500 100755
+--- a/src/get_clock.h
++++ b/src/get_clock.h
+@@ -104,6 +104,15 @@ static inline cycles_t get_cycles()
+ 	asm volatile("mrs %0, cntvct_el0" : "=r" (cval));
+ 	return cval;
+ }
++#elif defined(__riscv)
++typedef unsigned long cycles_t;
++
++cycles_t perf_get_cycles();
++
++static inline cycles_t get_cycles()
++{
++	return perf_get_cycles();
++}
+ 
+ #elif defined(__loongarch64)
+ typedef unsigned long cycles_t;
+-- 
+2.40.1
+
diff --git a/0010-Perftest-Support-selecting-congestion-control-algori.patch b/0010-Perftest-Support-selecting-congestion-control-algori.patch
new file mode 100644
index 0000000..41ee578
--- /dev/null
+++ b/0010-Perftest-Support-selecting-congestion-control-algori.patch
@@ -0,0 +1,276 @@
+From e8164fdc9ce332217a7877ffb6d1535bf0261fb1 Mon Sep 17 00:00:00 2001
+From: Guofeng Yue <yueguofeng@h-partners.com>
+Date: Fri, 28 Jun 2024 10:56:09 +0800
+Subject: [PATCH] Perftest: Support selecting congestion control algorithms
+
+Support configuring congestion control algorithms with hns direct verbs.
+
+    New option:  --congest_type
+
+    Usage example:
+    ./ib_send_bw -d hns_0 --congest_type=DCQCN
+    ./ib_send_bw -d hns_0 --congest_type=DCQCN 192.168.100.100
+
+Signed-off-by: Guofeng Yue <yueguofeng@h-partners.com>
+Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
+---
+ Makefile.am               | 24 ++++++++---------
+ configure.ac              |  7 +++++
+ src/perftest_parameters.c | 57 +++++++++++++++++++++++++++++++++++++++
+ src/perftest_parameters.h |  1 +
+ src/perftest_resources.c  | 12 +++++++++
+ src/perftest_resources.h  |  3 +++
+ 6 files changed, 92 insertions(+), 12 deletions(-)
+
+diff --git a/Makefile.am b/Makefile.am
+index e6a1132..1f09a61 100755
+--- a/Makefile.am
++++ b/Makefile.am
+@@ -57,41 +57,41 @@ LIBMLX4=
+ endif
+ 
+ ib_send_bw_SOURCES = src/send_bw.c src/multicast_resources.c src/multicast_resources.h
+-ib_send_bw_LDADD = libperftest.a $(LIBUMAD) $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA)
++ib_send_bw_LDADD = libperftest.a $(LIBUMAD) $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA) $(LIBHNS)
+ 
+ ib_send_lat_SOURCES = src/send_lat.c src/multicast_resources.c src/multicast_resources.h
+-ib_send_lat_LDADD = libperftest.a $(LIBUMAD) $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA)
++ib_send_lat_LDADD = libperftest.a $(LIBUMAD) $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA) $(LIBHNS)
+ 
+ ib_write_lat_SOURCES = src/write_lat.c
+-ib_write_lat_LDADD = libperftest.a $(LIBMATH)  $(LIBMLX4) $(LIBMLX5) $(LIBEFA)
++ib_write_lat_LDADD = libperftest.a $(LIBMATH)  $(LIBMLX4) $(LIBMLX5) $(LIBEFA) $(LIBHNS)
+ 
+ ib_write_bw_SOURCES = src/write_bw.c
+-ib_write_bw_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA)
++ib_write_bw_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA) $(LIBHNS)
+ 
+ ib_read_lat_SOURCES = src/read_lat.c
+-ib_read_lat_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA)
++ib_read_lat_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA) $(LIBHNS)
+ 
+ ib_read_bw_SOURCES = src/read_bw.c
+-ib_read_bw_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA)
++ib_read_bw_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA) $(LIBHNS)
+ 
+ ib_atomic_lat_SOURCES = src/atomic_lat.c
+-ib_atomic_lat_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA)
++ib_atomic_lat_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA) $(LIBHNS)
+ 
+ ib_atomic_bw_SOURCES = src/atomic_bw.c
+-ib_atomic_bw_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA)
++ib_atomic_bw_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA) $(LIBHNS)
+ 
+ if HAVE_RAW_ETH
+ raw_ethernet_bw_SOURCES = src/raw_ethernet_send_bw.c
+-raw_ethernet_bw_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA)
++raw_ethernet_bw_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA) $(LIBHNS)
+ 
+ raw_ethernet_lat_SOURCES = src/raw_ethernet_send_lat.c
+-raw_ethernet_lat_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA)
++raw_ethernet_lat_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA) $(LIBHNS)
+ 
+ raw_ethernet_burst_lat_SOURCES = src/raw_ethernet_send_burst_lat.c
+-raw_ethernet_burst_lat_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA)
++raw_ethernet_burst_lat_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA) $(LIBHNS)
+ 
+ raw_ethernet_fs_rate_SOURCES = src/raw_ethernet_fs_rate.c
+-raw_ethernet_fs_rate_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA)
++raw_ethernet_fs_rate_LDADD = libperftest.a $(LIBMATH) $(LIBMLX4) $(LIBMLX5) $(LIBEFA) $(LIBHNS)
+ 
+ else
+ raw_ethernet_bw_SOURCES =
+diff --git a/configure.ac b/configure.ac
+index 2bbc7fc..54fc2cc 100755
+--- a/configure.ac
++++ b/configure.ac
+@@ -291,6 +291,13 @@ if [test $HAVE_MLX5DV_LIB = yes] && [test $HAVE_MLX5DV = yes]; then
+ 	AC_SUBST([LIBMLX5])
+ fi
+ 
++AC_CHECK_LIB([hns], [hnsdv_query_device], [HAVE_HNSDV=yes LIBHNS=-lhns], [HAVE_HNSDV=no])
++AM_CONDITIONAL([HAVE_HNSDV], [test "x$HAVE_HNSDV" = "xyes"])
++if [test $HAVE_HNSDV = yes]; then
++       AC_DEFINE([HAVE_HNSDV], [1], [Have hns Direct Verbs support])
++       AC_SUBST([LIBHNS])
++fi
++
+ CFLAGS="-g -Wall -D_GNU_SOURCE -O3 $CFLAGS"
+ LIBS=$LIBS" -lpthread"
+ AC_SUBST([LIBUMAD])
+diff --git a/src/perftest_parameters.c b/src/perftest_parameters.c
+index 034a20e..6fdf0a1 100755
+--- a/src/perftest_parameters.c
++++ b/src/perftest_parameters.c
+@@ -27,6 +27,9 @@ static const char *portStates[] = {"Nop","Down","Init","Armed","","Active Defer"
+ static const char *qp_state[] = {"OFF","ON"};
+ static const char *exchange_state[] = {"Ethernet","rdma_cm"};
+ static const char *atomicTypesStr[] = {"CMP_AND_SWAP","FETCH_AND_ADD"};
++#ifdef HAVE_HNSDV
++static const char *congestStr[] = {"DCQCN","LDCP","HC3","DIP"};
++#endif
+ 
+ /******************************************************************************
+  * parse_mac_from_str.
+@@ -432,6 +435,11 @@ static void usage(const char *argv0, VerbType verb, TestType tst, int connection
+ 	printf("      --cpu_util ");
+ 	printf(" Show CPU Utilization in report, valid only in Duration mode \n");
+ 
++	#ifdef HAVE_HNSDV
++	printf("      --congest_type=<DCQCN, LDCP, HC3, DIP> ");
++	printf(" Use the hnsdv interface to set congestion control algorithm.\n");
++	#endif
++
+ 	if (tst != FS_RATE) {
+ 		printf("      --dlid ");
+ 		printf(" Set a Destination LID instead of getting it from the other side.\n");
+@@ -814,6 +822,7 @@ static void init_perftest_params(struct perftest_parameters *user_param)
+ 	user_param->disable_pcir		= 0;
+ 	user_param->source_ip		= NULL;
+ 	user_param->has_source_ip	= 0;
++	user_param->congest_type	= OFF;
+ }
+ 
+ static int open_file_write(const char* file_path)
+@@ -911,6 +920,25 @@ static void change_conn_type(int *cptr, VerbType verb, const char *optarg)
+ 		exit(1);
+ 	}
+ }
++
++#ifdef HAVE_HNSDV
++static void set_congest_type(int *cgtr, const char *optarg)
++{
++	if (strcmp(congestStr[0], optarg) == 0) {
++		*cgtr = HNSDV_QP_CREATE_ENABLE_DCQCN;
++	} else if (strcmp(congestStr[1], optarg) == 0) {
++		*cgtr = HNSDV_QP_CREATE_ENABLE_LDCP;
++	} else if (strcmp(congestStr[2], optarg) == 0) {
++		*cgtr = HNSDV_QP_CREATE_ENABLE_HC3;
++	} else if (strcmp(congestStr[3], optarg) == 0) {
++		*cgtr = HNSDV_QP_CREATE_ENABLE_DIP;
++	} else {
++		fprintf(stderr, " Invalid congest type. Please choose from {DCQCN,LDCP,HC3,DIP}\n");
++		exit(1);
++	}
++}
++#endif
++
+ /******************************************************************************
+  *
+  ******************************************************************************/
+@@ -2057,6 +2085,23 @@ static void ctx_set_max_inline(struct ibv_context *context,struct perftest_param
+ 		}
+ 	}
+ 
++	#ifdef HAVE_HNSDV
++	if (user_param->congest_type) {
++		if (user_param->work_rdma_cm == ON)
++		{
++			printf(RESULT_LINE);
++			fprintf(stderr, "rdma_cm does not support setting congest type.\n");
++			exit(1);
++		}
++
++		if (user_param->connection_type == XRC || user_param->connection_type == UD) {
++			printf(RESULT_LINE);
++			fprintf(stdout, "XRC/UD does not support setting congest type.\n");
++			exit(1);
++		}
++	}
++	#endif
++
+ 	return;
+ }
+ /******************************************************************************
+@@ -2176,6 +2221,9 @@ int parser(struct perftest_parameters *user_param,char *argv[], int argc)
+ 	static int credentials_path_flag = 0;
+ 	static int data_enc_key_app_path_flag = 0;
+ 	#endif
++	#ifdef HAVE_HNSDV
++	static int congest_type_flag = 0;
++	#endif
+ 
+ 	char *server_ip = NULL;
+ 	char *client_ip = NULL;
+@@ -2323,6 +2371,9 @@ int parser(struct perftest_parameters *user_param,char *argv[], int argc)
+ 			#if defined HAVE_OOO_ATTR
+ 			{.name = "use_ooo", .has_arg = 0, .flag = &use_ooo_flag, .val = 1},
+ 			#endif
++			#ifdef HAVE_HNSDV
++                        { .name = "congest_type", .has_arg = 1, .flag = &congest_type_flag, .val = 1},
++                        #endif
+ 			{.name = "source_ip", .has_arg = 1, .flag = &source_ip_flag, .val = 1},
+ 			{0}
+ 		};
+@@ -2569,6 +2620,12 @@ int parser(struct perftest_parameters *user_param,char *argv[], int argc)
+ 			case 'v': user_param->mac_fwd = ON; break;
+ 			case 'G': user_param->use_rss = ON; break;
+ 			case 0: /* required for long options to work. */
++                                #ifdef HAVE_HNSDV
++                                if (congest_type_flag) {
++                                        set_congest_type(&user_param->congest_type, optarg);
++                                        congest_type_flag = 0;
++                                }
++                                #endif
+ 				if (pkey_flag) {
+ 					user_param->pkey_index = strtol(optarg,NULL,0);
+ 					pkey_flag = 0;
+diff --git a/src/perftest_parameters.h b/src/perftest_parameters.h
+index 909d771..ffc19ab 100755
+--- a/src/perftest_parameters.h
++++ b/src/perftest_parameters.h
+@@ -462,6 +462,7 @@ struct perftest_parameters {
+ 	int 				recv_post_list;
+ 	int				duration;
+ 	int 				use_srq;
++	int 				congest_type;
+ 	int				use_xrc;
+ 	int				use_rss;
+ 	int				srq_exists;
+diff --git a/src/perftest_resources.c b/src/perftest_resources.c
+index bcec080..451f11d 100755
+--- a/src/perftest_resources.c
++++ b/src/perftest_resources.c
+@@ -2155,6 +2155,9 @@ struct ibv_qp* ctx_qp_create(struct pingpong_context *ctx,
+ 	struct efadv_qp_init_attr efa_attr = {};
+ 	#endif
+ 	#endif
++        #ifdef HAVE_HNSDV
++        struct hnsdv_qp_init_attr hns_attr = {};
++        #endif
+ 
+ 	attr.send_cq = ctx->send_cq;
+ 	attr.recv_cq = (user_param->verb == SEND) ? ctx->recv_cq : ctx->send_cq;
+@@ -2316,6 +2319,15 @@ struct ibv_qp* ctx_qp_create(struct pingpong_context *ctx,
+ 			#endif // HAVE_AES_XTS
+ 			else
+ 			#endif // HAVE_MLX5DV
++
++			#ifdef HAVE_HNSDV
++			if (user_param->congest_type) {
++				hns_attr.comp_mask = HNSDV_QP_INIT_ATTR_MASK_QP_CONGEST_TYPE;
++				hns_attr.congest_type = user_param->congest_type;
++				qp = hnsdv_create_qp(ctx->context, &attr_ex, &hns_attr);
++			}
++			else
++			#endif //HAVE_HNSDV
+ 				qp = ibv_create_qp_ex(ctx->context, &attr_ex);
+ 		}
+ 		else
+diff --git a/src/perftest_resources.h b/src/perftest_resources.h
+index ea4a6c4..cf0502c 100755
+--- a/src/perftest_resources.h
++++ b/src/perftest_resources.h
+@@ -55,6 +55,9 @@
+ #if defined(HAVE_MLX5DV)
+ #include <infiniband/mlx5dv.h>
+ #endif
++#if defined(HAVE_HNSDV)
++#include <infiniband/hnsdv.h>
++#endif
+ #include <rdma/rdma_cma.h>
+ #include <stdint.h>
+ #if defined(__FreeBSD__)
+-- 
+2.25.1
+
diff --git a/0011-Perftest-Fix-rx_depth-check-for-XRC.patch b/0011-Perftest-Fix-rx_depth-check-for-XRC.patch
new file mode 100644
index 0000000..172be7d
--- /dev/null
+++ b/0011-Perftest-Fix-rx_depth-check-for-XRC.patch
@@ -0,0 +1,71 @@
+From c642cd2753b1b9343a5642ffeaaa78ef135f0f6e Mon Sep 17 00:00:00 2001
+From: Junxian Huang <huangjunxian6@hisilicon.com>
+Date: Fri, 24 May 2024 17:32:27 +0800
+Subject: [PATCH] Perftest: Fix rx_depth check for XRC
+
+When users manually specifies --use_srq in perftest command, the rx_depth
+will be checked. If rx_depth is less than the number of qps, the process
+will throw an error and exit.
+
+For XRC SEND where SRQ is definitely used, users normally don't need to
+manually specifies --use_srq, since the use_srq flag will be set to on
+when parsing the XRC parameters. However, the XRC parameters parsing is
+after the SRQ rx_depth check. If rx_depth is less than the number of qps
+in this case, it will miss the check, size_per_qp in ctx_set_recv_wqes()
+will become 0 and ibv_post_srq_recv() won't be called.
+
+Move the XRC parameters parsing ahead of SRQ rx_depth check and set
+--use_srq to on in advance so that the rx_depth error can be thrown.
+
+Fixes: 4c774a951b3c ("Added XRC for ib_send_bw test")
+Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
+---
+ src/perftest_parameters.c | 25 +++++++++++++------------
+ 1 file changed, 13 insertions(+), 12 deletions(-)
+
+diff --git a/src/perftest_parameters.c b/src/perftest_parameters.c
+index 5d27132..52b21dc 100755
+--- a/src/perftest_parameters.c
++++ b/src/perftest_parameters.c
+@@ -1098,7 +1098,19 @@ static void force_dependecies(struct perftest_parameters *user_param)
+ 		exit (1);
+ 	}
+ 
+-	if (user_param->use_srq && user_param->num_of_qps > user_param->rx_depth) {
++	/* XRC Part */
++	if (user_param->connection_type == XRC) {
++		if (user_param->work_rdma_cm == ON) {
++			printf(RESULT_LINE);
++			fprintf(stderr," XRC does not support RDMA_CM\n");
++			exit(1);
++		}
++		user_param->use_xrc = ON;
++		user_param->use_srq = ON;
++	}
++
++	if (user_param->use_srq && user_param->verb == SEND &&
++	    user_param->num_of_qps > user_param->rx_depth) {
+ 		printf(RESULT_LINE);
+ 		printf(" Using SRQ depth should be greater than number of QPs.\n");
+ 		exit (1);
+@@ -1396,17 +1408,6 @@ static void force_dependecies(struct perftest_parameters *user_param)
+ 	if (user_param->connection_type == DC && !user_param->use_srq)
+ 		user_param->use_srq = ON;
+ 
+-	/* XRC Part */
+-	if (user_param->connection_type == XRC) {
+-		if (user_param->work_rdma_cm == ON) {
+-			printf(RESULT_LINE);
+-			fprintf(stderr," XRC does not support RDMA_CM\n");
+-			exit(1);
+-		}
+-		user_param->use_xrc = ON;
+-		user_param->use_srq = ON;
+-	}
+-
+ 	if (!user_param->use_old_post_send)
+ 	{
+ 		#ifndef HAVE_IBV_WR_API
+-- 
+2.25.1
+
diff --git a/perftest.spec b/perftest.spec
new file mode 100644
index 0000000..3fc5a54
--- /dev/null
+++ b/perftest.spec
@@ -0,0 +1,108 @@
+Name:           perftest
+Version:        4.5
+Release:        9
+License:        GPLv2 or BSD
+Summary:        RDMA Performance Testing Tools
+Url:            https://github.com/linux-rdma/perftest
+Source:         https://github.com/linux-rdma/perftest/releases/download/v4.5-0.12/perftest-4.5-0.12.ge93c538.tar.gz
+
+Patch1: 0001-perftest_parameters-Add-inline-feature-support-of-ER.patch
+Patch2: 0002-Perftest-replace-rand-with-getrandom-during-MR-buffe.patch
+Patch3: 0003-Perftest-Fix-verification-of-max_inline_data-for-_cr.patch
+Patch4: 0004-Perftest-Increase-max-inline-size-to-support-larger-.patch
+Patch5: 0005-Perftest-Add-support-for-HNS.patch
+Patch6: 0006-Perftest-Add-new-HNS-roce-device-ROH-to-support-new_.patch
+Patch7: 0007-add-loongarch-support-for-perftest.patch
+Patch8: 0008-Get-CPU-MHz-on-RISC-V.patch
+Patch9: 0009-Get-CPU-cycles-on-RISC-V.patch
+Patch10: 0010-Perftest-Support-selecting-congestion-control-algori.patch
+Patch11: 0011-Perftest-Fix-rx_depth-check-for-XRC.patch
+
+BuildRequires:  automake gcc libibverbs-devel >= 1.2.0 librdmacm-devel >= 1.0.21 libibumad-devel >= 1.3.10.2
+BuildRequires:  pciutils-devel libibverbs librdmacm libibumad
+BuildRequires:  guile
+Obsoletes:      openib-perftest < 1.3
+
+%description
+Perftest is a collection of simple tools for testing bandwidth and latency over RDMA connections.
+
+%prep
+%autosetup -p1
+
+%build
+./autogen.sh
+%configure
+%make_build CFLAGS+="-fPIC -g -Wall -D_GNU_SOURCE -O3"
+
+%install
+for file in ib_{atomic,read,send,write}_{lat,bw} raw_ethernet_{lat,bw}; do
+     install -D -m 0755 $file %{buildroot}%{_bindir}/$file
+done
+
+%files
+%doc README COPYING
+%_bindir/*
+
+%changelog
+* Mon Jul 22 2024 liweigang <liweiganga@uniontech.com> - 4.5-9
+- Type: bugfix
+- ID: NA
+- SUG: NA
+- DESC: fix build error due to automake update 1.17
+
+* Mon Jul 8 2024 Xinghai Cen <cenxinghai@h-partners.com> - 4.5-8
+- Type: bugfix
+- ID: NA
+- SUG: NA
+- DESC: fix rx_depth check for XRC
+
+* Mon Jul 8 2024 Xinghai Cen <cenxinghai@h-partners.com> - 4.5-7
+- Type: feature
+- ID: NA
+- SUG: NA
+- DESC: support selecting congestion control algorithms
+
+* Fri Jan 19 2024 Chengchang Tang <tangchengchang@huawei.com> - 4.5-6
+- Type: bugfix
+- ID: NA
+- SUG: NA
+- DESC: fix missing required libs
+
+* Mon Jul 03 2023 Xiaoqian Lv <xiaoqian@nj.iscas.ac.cn> - 4.5-5
+- Type: enhancement
+- ID: NA
+- SUG: NA
+- DESC: backport upstream 4.5-0.20 patches to support riscv64
+
+* Fri Jan 6 2023 Wenlong Zhang<zhangwenlong@loongson.cn> - 4.5-4
+- Type: bugfix
+- ID: NA
+- SUG: NA
+- DESC: fix build error for loongarch64
+
+* Tue Nov 22 2022 tangchengchang <tangchengchang@huawei.com> - 4.5-3
+- Type: bugfix
+- ID: NA
+- SUG: NA
+- DESC: Replace patches with the perftest community version.
+
+* Mon Nov 07 2022 tangchengchang <tangchengchang@huawei.com> - 4.5-2
+- Type: requirement
+- ID: NA
+- SUG: NA
+- DESC: Add hns support and fixes some bug in perftest
+
+* Tue Jan 18 2022 SimpleUpdate Robot <tc@openeuler.org> - 4.5-1
+- Upgrade to version 4.5
+
+* Tue Aug 03 2021 Shenmei Tu <tushenmei@huawei.com> - 4.2-7
+- bugfix-of-gcc-10.patch
+
+* Fri Jul 30 2021 Shenmei Tu <tushenmei@huawei.com> - 4.2-6
+- bug fix of multiple definition
+
+* Wed Jun 02 2021 zhaoyao<zhaoyao32@huawei.com> - 4.2-5
+- fixs faileds: /bin/sh: gcc: command not found.
+
+* Wed Nov 13 2019 Shuaishuai Song <songshuaishuai2@huawei.com> - 4.2-4
+- Package init
diff --git a/sources b/sources
new file mode 100644
index 0000000..c18e85f
--- /dev/null
+++ b/sources
@@ -0,0 +1 @@
+e2262e359f784e3bf340068205c14724  perftest-4.5-0.12.ge93c538.tar.gz