automatic import of compat-libgfortran-48openeuler24.03_LTSopeneuler23.09

1 files changed, 77 insertions, 0 deletions

diff --git a/gcc48-rh1535655-5.patch b/gcc48-rh1535655-5.patch
new file mode 100644
index 0000000..16539c9
--- /dev/null
+++ b/gcc48-rh1535655-5.patch
@@ -0,0 +1,77 @@
+commit 6effbc703b711779a196e5dbaf6335f39fab71c2
+Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
+Date:   Tue Jan 16 11:19:51 2018 +0000
+
+    HJ patch #4
+
+diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
+index 9dffd02f..e73389b 100644
+--- a/gcc/config/i386/i386.c
++++ b/gcc/config/i386/i386.c
+@@ -14497,6 +14497,7 @@ put_condition_code (enum rtx_code code, enum machine_mode mode, bool reverse,
+    If CODE is 'h', pretend the reg is the 'high' byte register.
+    If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op.
+    If CODE is 'd', duplicate the operand for AVX instruction.
++   If CODE is 'V', print naked full integer register name without %.
+  */
+ 
+ void
+@@ -14506,7 +14507,7 @@ print_reg (rtx x, int code, FILE *file)
+   unsigned int regno;
+   bool duplicated = code == 'd' && TARGET_AVX;
+ 
+-  if (ASSEMBLER_DIALECT == ASM_ATT)
++  if (ASSEMBLER_DIALECT == ASM_ATT && code != 'V')
+     putc ('%', file);
+ 
+   if (x == pc_rtx)
+@@ -14542,6 +14543,14 @@ print_reg (rtx x, int code, FILE *file)
+   else
+     code = GET_MODE_SIZE (GET_MODE (x));
+ 
++  if (code == 'V')
++    {
++      if (GENERAL_REGNO_P (regno))
++	code = GET_MODE_SIZE (word_mode);
++      else
++	error ("'V' modifier on non-integer register");
++    }
++
+   /* Irritatingly, AMD extended registers use different naming convention
+      from the normal registers: "r%d[bwd]"  */
+   if (REX_INT_REGNO_P (regno))
+@@ -14695,6 +14704,7 @@ get_some_local_dynamic_name (void)
+    & -- print some in-use local-dynamic symbol name.
+    H -- print a memory address offset by 8; used for sse high-parts
+    Y -- print condition for XOP pcom* instruction.
++   V -- print naked full integer register name without %.
+    + -- print a branch hint as 'cs' or 'ds' prefix
+    ; -- print a semicolon (after prefixes due to bug in older gas).
+    ~ -- print "i" if TARGET_AVX2, "f" otherwise.
+@@ -14919,6 +14929,7 @@ ix86_print_operand (FILE *file, rtx x, int code)
+ 	case 'X':
+ 	case 'P':
+ 	case 'p':
++	case 'V':
+ 	  break;
+ 
+ 	case 's':
+diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-register-4.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-register-4.c
+new file mode 100644
+index 0000000..f0cd9b7
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-register-4.c
+@@ -0,0 +1,13 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mindirect-branch=keep -fno-pic" } */
++
++extern void (*func_p) (void);
++
++void
++foo (void)
++{
++  asm("call __x86_indirect_thunk_%V0" : : "a" (func_p));
++}
++
++/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_eax" { target ia32 } } } */
++/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_rax" { target { ! ia32 } } } } */