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authorCoprDistGit <infra@openeuler.org>2025-01-11 08:08:40 +0000
committerCoprDistGit <infra@openeuler.org>2025-01-11 08:08:40 +0000
commit9ea6565d3362efbb0d9f050ba390e90bd81db457 (patch)
treee7b25e873b1a369acbf2323bd755a496a9c8a114 /riscv-v8.patch
parente9abc6c72d6b470c59f4c9e9b5af6dfe5d1a75b2 (diff)
automatic import of chromiumopeneuler22.03_LTS_SP4
Diffstat (limited to 'riscv-v8.patch')
-rw-r--r--riscv-v8.patch27
1 files changed, 27 insertions, 0 deletions
diff --git a/riscv-v8.patch b/riscv-v8.patch
new file mode 100644
index 0000000..8fe236b
--- /dev/null
+++ b/riscv-v8.patch
@@ -0,0 +1,27 @@
+Index: chromium-128.0.6613.84/v8/src/wasm/baseline/riscv/liftoff-assembler-riscv-inl.h
+===================================================================
+--- chromium-128.0.6613.84.orig/v8/src/wasm/baseline/riscv/liftoff-assembler-riscv-inl.h
++++ chromium-128.0.6613.84/v8/src/wasm/baseline/riscv/liftoff-assembler-riscv-inl.h
+@@ -2368,6 +2368,22 @@ void LiftoffAssembler::CallFrameSetupStu
+ CallBuiltin(Builtin::kWasmLiftoffFrameSetup);
+ }
+
++bool LiftoffAssembler::emit_f16x8_splat(LiftoffRegister dst,
++ LiftoffRegister src) {
++ return false;
++}
++bool LiftoffAssembler::emit_f16x8_extract_lane(LiftoffRegister dst,
++ LiftoffRegister lhs,
++ uint8_t imm_lane_idx) {
++ return false;
++}
++bool LiftoffAssembler::emit_f16x8_replace_lane(LiftoffRegister dst,
++ LiftoffRegister src1,
++ LiftoffRegister src2,
++ uint8_t imm_lane_idx) {
++ return false;
++}
++
+ } // namespace v8::internal::wasm
+
+ #endif // V8_WASM_BASELINE_RISCV_LIFTOFF_ASSEMBLER_RISCV_INL_H_